{"id":1081,"date":"2018-12-03T11:33:02","date_gmt":"2018-12-03T11:33:02","guid":{"rendered":"http:\/\/www.gyanvihar.org\/journals\/?p=1081"},"modified":"2019-06-12T05:51:15","modified_gmt":"2019-06-12T05:51:15","slug":"making-a-new-world-using-ibm-synapse-chipneuromorphic","status":"publish","type":"post","link":"https:\/\/www.gyanvihar.org\/journals\/making-a-new-world-using-ibm-synapse-chipneuromorphic\/","title":{"rendered":"Making a New World Using IBM SyNAPSE  ChipNeuromorphic"},"content":{"rendered":"<p>pp.36-39<\/p>\n<p style=\"text-align: center\"><sup><strong>Sandeep Kumar Singh<\/strong><strong>1<\/strong><strong>, Jitendra Prajapat<\/strong><strong>2<\/strong><strong>, Amit Asthana<\/strong><strong>3<\/strong><\/sup><br \/>\nSITE, Swami Vivekananda Subharti University, Meerut<\/p>\n<p style=\"text-align: justify\"><strong>Abstract-<\/strong>The modern day computer has Limitations a significant Improvement in its performance and storage capacity and speed of Computation. However, Current processor cores and IBM SyNAPSE Neuromorphic chip are very differ in speed ,capacity, storage, power consumption ,etc. IBM has been work over this TrueNorth architecture technology and with the launching of SyNAPSE neurosynaptic chips, it has been open a new way of Process computations. This paper aims at viewing the various phases and researches that have been pointed in the overall development of IBM SyNAPSE neuromorphic chip using TrueNorth Architecture which has aims to developing electronic neuromorphic machine technology flexible brain like structure capable of performing wide range of real time computations that keeps less Power consumption and size factor in mind that scales level to Biological level. Inspired by the human brain, which is capable of performing complex tasks without being programmed and utilizing very less energy. The SyNAPSE neuromorphic chip uses of 256 programmable silicon leaky-integrate-and-fire neurons, 1024 \u00d7 256 crossbar synapses, and address-event representing communication circuits ,consuming only 45 pJ of active power per spike with a less power supply of 0.85 V, can be used in first stage of processing in low-power artificial chemical sensing devices inspired by natural olfactory systems.<br \/>\n<strong>Keywords-<\/strong> Neuromorphic chip, TrueNorth architecture, power consumption, Process computation, human brain<\/p>\n<p style=\"text-align: justify\">I. INTRODUCTION<br \/>\nIBM SyNAPSE Neuromorphic chip is a DARPA (Defense Advanced Research Projects Agency), an agency that is part of the U.S. Department of Defense funded program that based on human brain model of neurons that coordinate actions and transmits signals to and from different parts of its body. In the neuron system, a synapseis a structure that permits a neuron or neuron cell to pass an electrical or chemical signal to another neuron cell. The IBM SyNAPSE Neuromorphic chip built-in [1] 5.4-billion-transistor chip with 4096 neurosynaptic cores inter-connected via an intrachip network that integrates 1 million programmable spiking neurons and 256 million configurable synapses, Chips can be built-in two dimensions via an interchip communication interface, seamlessly scaling the architecture to a cortexlike sheet of arbitrary size. The architecture is well balanced to many applications that are using complex neural networks in real time, for example, multi object detection and classification. With 400-pixel-by-240-pixel video input at 30 frames per second, the chip consumes 70 milliwatts, information processing systems using electronic circuits and devices built-in using design principles that are based on biological neurons system. The circuits are type of designed using mixed-mode analog and digital Complementary Metal-Oxide-Semiconductor (CMOS) transistors and fabricated using standard Very Large Scale Integration (VLSI) designed processes,the biological systems that are model, IBM SyNAPSE neuromorphic chip systems are process information using energy-efficient asynchronous, event-driven.<br \/>\nI. WHAT IS TRUE NORTH?<br \/>\nTrueNorth is an architecture and neuromorphic CMOS chip developed by IBM. It uses 4096 hardware cores, each of simulating 256 programmable silicon &#8220;neurons&#8221; total of a million neurons. In IBM SyNAPSE Neuromorphic chip, each neuron has 256 programmable &#8220;synapses&#8221; which is gateway for the signals between them. [2] The total number of programmable synapses is 268 million .In basic term building blocks, its transistorcount is 5.4 billion. In this technology, computation,memory and communication are connected by each of the 4096 neurosynaptic cores, TrueNorth is use very less energy-efficient, consuming 70 milliwatts, about 1\/10,000th the power density of conventional microprocessors.<br \/>\nA. FUNCTION<br \/>\nThe IBM SyNAPSE Polymorphic Chip based on Human Brain, you can also say that inspired by Human Brain. The computational Architecture are similar to biological brain architecture. IBM SyNAPSE Polymorphic Chip is based Human brain four main and important function unit Neurons, Dendrite, Axon and Synapse. [3]<\/p>\n<p style=\"text-align: justify\">\uf0b7 Neuron- Neurons are the fundamental units of the brain and nervous system, the cells having control over for receiving sensory input from the external source, for sending motor commands to our muscles, and transforming and relaying the electrical signals at every node in between.<\/p>\n<p style=\"text-align: justify\">\uf0b7 Dendrite-The receiving part of the neuron, dendrites receive synaptic inputs from axons, with the sum total of dendrite inputs discovering and reported the neuron will process to an action potential.<\/p>\n<p style=\"text-align: justify\">\uf0b7 Axon-The long, thin structure in which action potentials are generated; the\u00a0transmitting part of the neuron. After initiation, action potentials travel down axons to release of neurotransmitter. \uf0b7 Synapse- The junction between the axon of one neuron and the dendrite of another, through which the two neurons communicate.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\" wp-image-1176 aligncenter\" src=\"http:\/\/www.gyanvihar.org\/journals\/wp-content\/uploads\/2018\/12\/aa-50.jpg\" alt=\"\" width=\"352\" height=\"500\" \/><\/p>\n<p style=\"text-align: justify\"><strong>A. Technology Area<\/strong><br \/>\nThe IBM SyNAPSE Polymorphic Chip project will be an approach that can coordinate four technology area development activities are following: hardware; architecture; simulation; and environment. [5]<br \/>\n\uf0b7 Hardware &#8211; implementation will possible include CMOS devices, novel synaptic components, and combinations of hard-wired and programmable\/virtual connectivity. These will support information processing techniques is inspired from biological systems, such as spike encoding and spike timing dependent plasticity.<br \/>\n\uf0b7 Architecture \u2013These will support critical structures and functions declare in biological systems such as connectivity, core component of system circuitry, hierarchical organization, competitive self-organization, and modulator reinforcement systems. As used in biological systems, processing will be necessarily be maximally distributed, nonlinear, and inherently noise- and defect-tolerant.<br \/>\n\uf0b7 Simulation \u2013These will support large-scale digital simulations of circuits and systems will be used to establish the relationship component and all part of system functionality and to inform overall system\u00a0development in advance of neuromorphic hardware implementation.<br \/>\n\uf0b7 Environment \u2013These will support critical evolving, virtual platforms for the training, evaluation and benchmarking of intelligent machines in all of gateway of perception, cognition, and response.<\/p>\n<p style=\"text-align: justify\"><strong>B. Key points of Integrated SyNAPSE Technology<\/strong><br \/>\n\uf0b7 Supercomputer Simulations<br \/>\n\uf0b7 Neuroscience Data<br \/>\n\uf0b7 Simulation with 100 trillion synapses<br \/>\n\uf0b7 Neurosynaptic Core<br \/>\n\uf0b7 Architecture: A Network of Neurosynaptic Cores, Neuron Model<br \/>\n\uf0b7 Programming Model, End to end cognitive Ecosystem<br \/>\n\uf0b7 Algorithms and Applications<br \/>\n\uf0b7 Conceptual Models of Cognitive Syste<\/p>\n<p style=\"text-align: justify\"><strong>1. COLLABORATORS<\/strong><br \/>\nThis following organizations and agency are collaboration with the DARPA (Defense Advanced Research Projects Agency), SyNAPSE Neuromorphic Chip project. The main two organizations are IBM and HRL. These names of universities and companies are pointed in this paper [6].<br \/>\n\uf0b7 DARPA &#8211; program managed and hosted by Gill Pratt<br \/>\n\uf0b7 IBM Research &#8211; Cognitive Computing group hosted by DharmendraModha<br \/>\n\uf0b7 Cornell University &#8211; Asynchronous VLSI circuit design, the neurosynaptic core, hosted by RajitManohar.<br \/>\n\uf0b7 University of California, Merced &#8211; environment research, hosted by Christopher Kello<br \/>\n\uf0b7 University of Wisconsin-Madison &#8211; Simulation, theory of consciousness, computer models, hosted by GiulioTononi.<br \/>\n\uf0b7 Columbia University Medical Center &#8211; Theoretical neuroscience research, development of neural network models, hosted by Stefano Fusi.<br \/>\n\uf0b7 HRL Laboratories &#8211; Memristor-based processor development hosted by Narayan Srinivasa ,Organization names and Members are following:<\/p>\n<p>Boston University: Stephen Grossberg, Gail Carpenter, Yongqiang Cao, Praveen Pilly<br \/>\n\uf0b7 George Mason University: Giorgio Ascoli, Alexei Samsonovich<br \/>\n\uf0b7 Stanford University: Mark Schnitzer<br \/>\n\uf0b7 Set Corporation: Chris Long<br \/>\n\uf0b7 University of California-Irvine: Jeff Krichmar<br \/>\n\uf0b7 Portland State University: ChristofTeuscher<br \/>\n\uf0b7 The Neurosciences Institute: Gerald Edelman, Einar Gall, Jason Fleischer<br \/>\n\uf0b7 University of Michigan: Wei Lu<\/p>\n<p><strong>II. FORMERCOLLABORATORS:<\/strong><br \/>\n\uf0b7 HP Labs &#8211; a participant in phase 0 of the program but was dropped for upcoming phases. Research technique continues into memristor development, plus the Cog Ex<br \/>\n\uf0b7 Machine intelligent systems project which is hosted by Greg Snider.<\/p>\n<p style=\"text-align: justify\">Neuromorphics Lab- at Boston University &#8211; hosted by Massimiliano designed and sub-contracted by HP during phase 0. Continues project to receive funding from HP but independent of any DARPA support. The project is called MoNETA &#8211; an artificial like brain system.<\/p>\n<p style=\"text-align: justify\"><strong>III. FUNDING<\/strong><br \/>\nAll funding for the IBM SyNAPSE Neuromorphic Chip project comes from DARPA(Defense Advanced Research Projects Agency). Total funding per financial year (FINANCIAL YEAR) is as follows. The US government financial years begin on October 1 of the previous year. So financial years 2013 runs from October 1, 2012 to September 30, 2013. The budgets are published in advance each year in February, so the financial years 2014 budget is due to be published in February 2013.<\/p>\n<p style=\"text-align: justify\">FINANCIAL YEAR 2008 \u2013 Rs.0 (project started October 2008, i.e. start of FINANCIAL YEAR 2009)<br \/>\n\uf0b7 FINANCIAL YEAR 2009 \u2013 Rs. 198629719.77<br \/>\n\uf0b7 FINANCIAL YEAR 2010 \u2013 Rs.1127223659.71<br \/>\n\uf0b7 FINANCIAL YEAR 2011 \u2013 Rs.1827923101.17<br \/>\n\uf0b7 FINANCIAL YEAR 2012 \u2013 Rs.2052507104.32<\/p>\n<p style=\"text-align: justify\">FINANCIAL YEAR 2013 \u2013 Rs.1589037758.19<br \/>\nTotal: Rs. 6798456104.8500<br \/>\nFrom the above funds, awards were made to IBM and HRL as follows:<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"alignnone size-full wp-image-1181\" src=\"http:\/\/www.gyanvihar.org\/journals\/wp-content\/uploads\/2018\/12\/aa-51.jpg\" alt=\"\" width=\"492\" height=\"564\" \/><\/p>\n<p style=\"text-align: justify\"><strong>IV. TIMELINE<\/strong><br \/>\n2007\u00a0Apr &#8211; Todd Hylton joins in DARPA to found<br \/>\n2008\u00a0Apr &#8211; DARPA publishes is a request for applications for project May &#8211; Due date for initial recommendation for the project Oct &#8211; Winning contractors announced from DARPA Nov &#8211; Phase 0 start<br \/>\n2009\u00a0Sep &#8211; Phase 1 started Nov &#8211; Statement of project cat-scale brain simulation<br \/>\n2010,\u00a02011\u00a0Aug &#8211; Statement of project neuromorphic chip implementation from DARPA Sep &#8211; Phase 2 start Dec &#8211; Statement of project first memristor chip from DARPA<br \/>\n2012\u00a0Feb &#8211; Todd Hylton left from DARPA, Gill Pratt takes over as program manager May &#8211; Neuromorphic architecture design published Nov &#8211; TrueNorth\/Compass simulation of 530 billion neurons announced in this project<br \/>\n2013\u00a0Feb &#8211; Expected announcement of multi-core neurosynaptic chips (1 million neurons per chip)<\/p>\n<p>Mar &#8211; Phase 3 to begin (estimated date)<br \/>\n2014\u00a0Oct &#8211; Phase 4 to begin (estimated date)<br \/>\n2015,\u00a02016 &#8211;\u00a0Program end<\/p>\n<p style=\"text-align: justify\"><strong>V. CONCLUSION<\/strong><br \/>\nIn this research paper present an information survey about of IBM SyNAPSE Neuromorphic Chip architecture system that that is inspired of Human brain Architecture. And also research about SyNAPSE Neuromorphic chip and others Specification, Power density, Project features, Analog or Digital, Manufacturing process, largest current configuration, Next configuration, and Final configuration. The Organization and Agencies are collaboration with the DARPA for SyNAPSE Neuromorphic Chip project this paper has pointed Main organizations, Former collaborations, and funding plans of timeline.<\/p>\n<p style=\"text-align: justify\"><strong>REFERENCES<\/strong><br \/>\n1. Paul A. Merolla @ \u201c A million spiking-neuron integrated circuit with a scalable communication network and interface<br \/>\n2. TrueNorth From Wikipedia https:\/\/en.wikipedia.org\/wiki\/TrueNorth<br \/>\n3. Alan Woodruff \u201cNeuroscience Basic\u201d<br \/>\nhttp:\/\/www.qbi.uq.edu.au\/content\/neuroscience-basics-%E2%80%93-neurons-action-potentials-and-synapses<br \/>\n4. Giacomo Indiveri And Shih-Chii Lui \u201c Memory and Information Processing in neuromorphic system \u201c<br \/>\n5. http:\/\/www.artificialbrains.com\/darpa-synapse-program<br \/>\n6. http:\/\/www.artificialbrains.com\/darpa-synapse-program<\/p>\n","protected":false},"excerpt":{"rendered":"<p>pp.36-39 Sandeep Kumar Singh1, Jitendra Prajapat2, Amit Asthana3 SITE, Swami Vivekananda Subharti University, Meerut Abstract-The modern day computer has Limitations a significant Improvement in its performance and storage capacity and speed of Computation. However, Current processor cores and IBM SyNAPSE Neuromorphic chip are very differ in speed ,capacity, storage, power consumption ,etc. IBM has been [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[16],"tags":[],"class_list":["post-1081","post","type-post","status-publish","format-standard","hentry","category-journal-of-engineering-and-technology"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v24.7 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>research journal - Research Journal<\/title>\n<meta name=\"description\" content=\"The modern day computer has Limitations a significant Improvement in its performance and storage capacity and speed of Computation. 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