Basic structure of a computer system (CPU, memory, I/O), Data representation and formats (fixed-point, floating-point, character codes), ALU operations and status flags, Register organization and register transfer lan...
Basic structure of a computer system (CPU, memory, I/O), Data representation and formats (fixed-point, floating-point, character codes), ALU operations and status flags, Register organization and register transfer language, Bus structures and types of data paths, Instruction cycle (fetch, decode, execute) and micro-operations, Introduction to instruction set design and basic types of instructions (data movement, arithmetic/logic, control).
Overview of 8-bit vs. 16-bit microprocessors, Internal architecture of 8085 (registers, ALU, control unit, buses) as a baseline model, 8086 architecture: Bus Interface Unit (BIU) and Execution Unit (EU), General-purpose, segment, index, and pointer registers, Memory segmentation and logical vs. physical addresses, Clock, reset, and basic timing concepts, Concept of a simple instruction pipeline via 8086 prefetch queue.
8086 instruction format and classification (data transfer, arithmetic, logic, control flow, string operations), Addressing modes (immediate, register, direct, register indirect, indexed, based indexed, relative), Stack organization and procedure calls/returns, Condition codes and branching, Hardwired vs. microprogrammed control units, Micro-instructions and micro-operations, Introduction to interrupt structure (maskable vs. non-maskable) and basic exception handling model.
Main memory organization (RAM, ROM, memory maps), Memory interleaving and bandwidth considerations, Cache memory hierarchy (L1/L2/L3), cache mapping techniques (direct-mapped, associative, set-associative), cache write policies and performance trade-offs, Concept of virtual memory and address translation, I/O-mapped vs. memory-mapped I/O, Programmed I/O, interrupt-driven I/O, and Direct Memory Access (DMA) for high-speed peripherals.
RISC vs. CISC philosophies in contemporary processors (x86 vs. ARM), Pipelining hazards (structural, data, control) and high-level techniques to mitigate them, Overview of superscalar execution and out-of-order pipelines, Multi-core and many-core processors, shared memory and coherence concepts, System-on-Chip (SoC) integration in modern designs, Case studies of current CPU families (Intel/AMD x86 and Apple M-series) focusing on cores, caches, integrated accelerators (GPU/Neural engines), and unified memory architectures.