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Unit 1: Digital Systems and Boolean Algebra
Introduction to Digital vs. Analog Systems. Number Systems (Binary, Octal, Hexadecimal) and Base Conversions. Signed Number Representations (Sign-Magnitude, 1's and 2's Complement). Binary Codes (BCD, Gray Code). Axiomatic Definition of Boolean Algebra, Basic Theorems and Properties. Logic Gates (AND, OR, NOT, NAND, NOR, XOR, XNOR). Canonical and Standard Forms (SOP, POS).
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Unit 2: Logic Function Minimization and Combinational Circuits
Minimization of Boolean functions using Karnaugh Maps (K-Maps) up to 4 variables. "Don't Care" conditions. Introduction to Combinational Logic Circuits. Design of Arithmetic Circuits: Half Adder, Full Adder, Ripple Carry Adder, Half Subtractor, Full Subtractor. Magnitude Comparators. Code Converters. Introduction to Hardware Description Language (HDL).
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Unit 3: MSI Combinational Components
Design and analysis of Medium Scale Integration (MSI) components. Decoders and Encoders (including Priority Encoders). Multiplexers (MUX) as universal function generators and for data routing. Demultiplexers (DEMUX). Introduction to Programmable Logic Devices (PLDs): Read-Only Memory (ROM), Programmable Logic Array (PLA), and Programmable Array Logic (PAL).
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Unit 4: Sequential Logic Fundamentals
Introduction to Sequential Circuits: Latches vs. Flip-Flops. The SR Latch (NAND/NOR implementations). Clocked SR, D, JK, and T Flip-Flops. Master-Slave JK Flip-Flop. Characteristic Tables and Excitation Tables. Timing Parameters: Propagation Delay, Setup Time, and Hold Time. Introduction to State Diagrams and State Tables.
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Unit 5: Registers, Counters, and State Machines
Registers: Buffer, Serial-In/Serial-Out (SISO), Parallel-In/Parallel-Out (PIPO), and Shift Registers. Counters: Asynchronous (Ripple) vs. Synchronous Counters. Design of Synchronous Counters using Flip-Flop Excitation Tables. Introduction to Finite State Machines (FSMs): Moore and Mealy models. FSM Design Procedure.